Interfacing with register-router table configuration

repost from:

Integrating with the Hardware

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NetFPGA reading lists from Universities

Recommended reading from Cambridge University

Strazisar, V. (1979). How to build a gateway.

Postel, J. (ed.) (1981). Internet protocol.

Baker, F. (ed.) (1995). Requirements for IP Version 4 Routers. Comer D. (2006). Internetworking with TCP-IP, Vol. 1.

Other: Continue reading

HDL softwares comparison (In Chinese)


这类软件主要是帮助用户完成HDL文本的编辑和输入工作,提高输入效率,并不是必须的,更多人更习惯使用集成开发软件或者综合/仿真工具中自带的文本编辑器,甚至可以直接使用普通文本编辑器。 Continue reading


Step by step packet generator configuration

About the packets loss

Since the PCI bandwidth is less than the maximum combined receive bandwidth across all four Ethernet ports it is possible that received packets will be dropped. Dropping of packets occurs when the buffers on the NetFPGA board overflow.

Packet generator This project provides a simple packet generator and capture tool. It is designed for use by anyone who wants to inject packets into a network and/or observe packets exiting a network.
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NetFPGA Registers

Global register map

Block Size Address Range
CPCI 4MB 0x0000000–0x03FFFFF
NF2 12MB 0x0400000–0x0FFFFFF
SRAM 16MB 0x1000000–0x1FFFFFF
NF2 32MB 0x0200000–0x3FFFFFF
DRAM 64MB 0x4000000–0x7FFFFFF

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error when installing NI Labview 2012 with DAQ module and drive

The “NI LabWindows/CVI 2010 SP1 Network Variable Library” installation has failed with the following error: Continue reading